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位置:AD9524/PCBZ > AD9524/PCBZ詳情
AD9524/PCBZ中文資料
AD9524/PCBZ數(shù)據(jù)手冊規(guī)格書PDF詳情
GENERAL DESCRIPTION
The AD9524 provides a low power, multi-output, clock distribution function with low jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 3.6 GHz to 4.0 GHz. The AD9524 is defined to support the clock requirements for long term evolution (LTE) and multicarrier GSM base station designs. It relies on an external VCXO to provide the reference jitter cleanup to achieve the restrictive low phase noise require ments necessary for acceptable data converter SNR performance.
FEATURES
Output frequency: <1 MHz to 1 GHz
Start-up frequency accuracy: <±100 ppm (determined by VCXO reference accuracy)
Zero delay operation
Input-to-output edge timing: <±150 ps
6 outputs: configurable LVPECL, LVDS, HSTL, and LVCMOS
6 dedicated output dividers with jitter-free adjustable delay
Adjustable delay: 63 resolution steps of ? period of VCO output divider
Output-to-output skew: <±50 ps
Duty-cycle correction for odd divider settings
Automatic synchronization of all outputs on power-up
Absolute output jitter: <200 fs at 122.88 MHz
Integration range: 12 kHz to 20 MHz
Distribution phase noise floor: ?160 dBc/Hz
Digital lock detect
Nonvolatile EEPROM stores configuration settings
SPI- and I2C-compatible serial control port
Dual PLL architecture
PLL1
Low bandwidth for reference input clock cleanup with external VCXO
Phase detector rate of 300 kHz to 75 MHz
Redundant reference inputs
Auto and manual reference switchover modes
Revertive and nonrevertive switching
Loss of reference detection with holdover mode
Low noise LVCMOS output from VCXO used for RF/IF synthesizers
PLL2
Phase detector rate of up to 250 MHz
Integrated low noise VCO
APPLICATIONS
LTE and multicarrier GSM base stations
Wireless and broadband infrastructure
Medical instrumentation
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
Low jitter, low phase noise clock distribution
Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols
Forward error correction (G.710)
High performance wireless transceivers
ATE and high performance instrumentation
AD9524/PCBZ產(chǎn)品屬性
- 類型
描述
- 型號
AD9524/PCBZ
- 功能描述
BOARD EVAL FOR AD9524
- RoHS
是
- 類別
編程器,開發(fā)系統(tǒng) >> 評估演示板和套件
- 系列
-
- 標準包裝
1
- 系列
PSoC®
- 主要目的
電源管理,熱管理
- 嵌入式
- 已用
- IC/零件
-
- 主要屬性
-
- 次要屬性
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- 已供物品
板,CD,電源
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
ADI/亞德諾 |
22+ |
66900 |
原封裝 |
||||
ADI/亞德諾 |
23+ |
EB/PCB |
3000 |
只做原裝正品,假一賠十 |
|||
ADI/亞德諾 |
2511 |
原封裝 |
66900 |
電子元器件采購降本 30%!盈慧通原廠直采,砍掉中間差價 |
|||
ADI |
20+ |
EvaluationBoard |
33680 |
ADI原裝主營-可開原型號增稅票 |
|||
ADI/亞德諾 |
25+ |
20000 |
原裝現(xiàn)貨,可追溯原廠渠道 |
||||
AD |
2019+/2020+ |
SOP24 |
1000 |
原裝正品現(xiàn)貨庫存 |
|||
AD |
1815+ |
QFN |
6528 |
只做原裝正品假一賠十為客戶做到零風險!! |
|||
ADI |
18+ |
LFCSP-48 |
85600 |
保證進口原裝可開17%增值稅發(fā)票 |
|||
ADI |
21+ |
LFCSP |
12588 |
原裝正品,自己庫存 假一罰十 |
|||
ADI/亞德諾 |
1734+ |
QFN |
38 |
原裝正品現(xiàn)貨,可開發(fā)票,假一賠十 |
AD9524/PCBZ 價格
參考價格:¥1415.1796
AD9524/PCBZ 資料下載更多...
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Datasheet數(shù)據(jù)表PDF頁碼索引
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Analog Devices 亞德諾半導(dǎo)體技術(shù)有限公司
(Analog Devices,簡稱ADI)成立于1965年,總部位于美國馬薩諸塞州諾丁漢,是全球領(lǐng)先的高性能模擬、混合信號和數(shù)字信號處理集成電路(IC)設(shè)計與制造公司。ADI致力于為各種應(yīng)用提供創(chuàng)新的解決方案,涵蓋通信、工業(yè)、汽車、醫(yī)療、消費電子和數(shù)據(jù)中心等多個領(lǐng)域。 公司以其強大的研發(fā)實力和專業(yè)技術(shù)著稱,擁有廣泛的產(chǎn)品組合,包括放大器、轉(zhuǎn)換器、傳感器和處理器等,能夠滿足客戶在信號處理和控制方面的需求。ADI的產(chǎn)品被廣泛應(yīng)用于數(shù)據(jù)測量、無線通信、音頻處理、視頻監(jiān)控以及自動化和控制系統(tǒng)等領(lǐng)域。 模擬器件公司始終致力于推動技術(shù)創(chuàng)新,憑借強大的科技實力,為客戶提供高效、可靠的解決方案,幫助他們提高