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FEATURES

50 mW at up to 250 MSPS internal clock speed 100 MHz analog output

Integrated 10-bit DAC

0.058 Hz or better frequency resolution

0.022° phase tuning resolution Programmable modulus in frequency equation Phase noise ≤ –135 dBc per Hz @ 1 kHz offset (DAC output) (<115 dBc per Hz when using on-board PLL multiplier) Excellent dynamic performance

>80 dB SFDR @ 100 MHz (±100 kHz offset) AOUT

Automatic linear frequency sweeping capability

8 frequency or phase offset profiles

1.8 V power supply

Software and hardware controlled power-down

Parallel and serial programming options 32-lead LFCSP package

Optional PLL REF_CLK multiplier

Internal oscillator (can be driven by a single crystal) Phase modulation capability

APPLICATIONS

Portable and handheld equipment

Agile LO frequency synthesis

Programmable clock generator

FM chirp source for radar and scanning systems