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Functional description

The AS7C33256PFD18B is a high performance CMOS 4 Mbit synchronous Static Random Access Memory (SRAM) devices organized as 262,144 words × 18 bits and incorporate a pipeline for highest frequency on any given technology.

Features

? Organization: 262,144 words × 18 bits

? Fast clock speeds to 200 MHz

? Fast clock to data access: 3.0/3.5/4.0 ns

? Fast OE access time: 3.0/3.5/4.0 ns

? Fully synchronous register-to-register operation

? Double-cycle deselect

? Asynchronous output enable control

? Available in 100-pin TQFP package

? Individual byte write and global write

? Multiple chip enables for easy expansion

? Linear or interleaved burst control

? Snooze mode for reduced power-standby

? Common data inputs and data outputs

? 3.3V core power supply

? 2.5V or 3.3V I/O operation with separate VDDQ