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DP8051CPU中文資料
DP8051CPU數(shù)據(jù)手冊(cè)規(guī)格書PDF詳情
OVERVIEW
DP8051 is an ultra high performance, speed optimized soft core of a single-chip 8-bit embedded controller dedicated for operation with fast (typically on-chip) and slow (off chip) memories. The core has been designed with a special concern about performance to power consumption ratio. This ratio is extended by an advanced power management unit PMU.
DP8051 soft core is 100 binary compatible with the industry standard 8051 8-bit microcontroller. There are two configurations of DP8051: Harward where internal data and program buses are separated, and von Neumann with common program and external data bus. DP8051 has Pipelined RISC architecture 10 times faster compared to standard architecture and executes 85-200 million in structions per second. This performance can also be exploited to great advantage in low power applications where the core can be clocked over ten times more slowly than the original implementation for no performance penalty.
DP8051 is delivered with fully automated testbench and complete set of tests allowing easy package validation at each stage of SoC
design flow.
CPU FEATURES
● 100 software compatible with industry standard 8051
● Pipelined RISC architecture enables to execute instructions
10 times faster com pared to standard 8051
● 24 times faster multiplication
● 12 times faster addition
● Up to 256 bytes of internal (on-chip) Data Memory
● Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
● Up to 16M bytes of external (off-chip) Data Memory
● User programmable Program Memory Wait States solution for wide range of memories speed
● User programmable External Data Memory Wait States solution for wide range of
memories speed
● De-multiplexed Address/Data bus to allow easy connection to memory
● Dedicated signal for Program Memory writes.
● Interface for additional Special Function Registers
● Fully synthesizable, static synchronous design with
positive edge clocking and no internal tri-states
● Scan test ready
● 2.0 GHz virtual clock frequency in a 0.35u technological process
DP8051CPU產(chǎn)品屬性
- 類型
描述
- 型號(hào)
DP8051CPU
- 制造商
DCD
- 制造商全稱
DCD
- 功能描述
Pipelined High Performance 8-bit Microcontroller
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
PARADE/譜瑞科技 |
24+ |
BGA |
8600 |
原裝正品支持實(shí)單 |
|||
24+ |
N/A |
58000 |
一級(jí)代理-主營(yíng)優(yōu)勢(shì)-實(shí)惠價(jià)格-不悔選擇 |
||||
DP |
24+ |
QFP |
5000 |
只做原裝公司現(xiàn)貨 |
|||
DP |
24+ |
QFP |
20000 |
一級(jí)代理原裝現(xiàn)貨假一罰十 |
|||
DP |
20+ |
QFP |
30278 |
原裝優(yōu)勢(shì)主營(yíng)型號(hào)-可開(kāi)原型號(hào)增稅票 |
|||
DP |
24+ |
QFP |
30266 |
大批量供應(yīng)優(yōu)勢(shì)庫(kù)存熱賣 |
|||
DP |
23+ |
QFP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
|||
DP |
24+ |
NA/ |
30266 |
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開(kāi)增值稅票 |
|||
DP |
25+ |
QFP |
30266 |
原裝正品,假一罰十! |
|||
DP |
25+ |
QFP |
30266 |
原裝正品,假一罰十! |
DP8051CPU 資料下載更多...
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Digital Core Design
Digital Core Design 是領(lǐng)先的知識(shí)產(chǎn)權(quán) (IP) 內(nèi)核提供商 和片上系統(tǒng) (SoC) 設(shè)計(jì)公司。我們公司總部位于波蘭、歐盟,提供 Verilog 和 VHDL處理器和微控制器、總線接口、算術(shù)協(xié)處理器和組件的高質(zhì)量可合成 IP 核。我們與其他IP核提供商的區(qū)別是什么?我們相信,知識(shí)產(chǎn)權(quán)的力量與創(chuàng)新的力量是相輔相成的。因此,我們獨(dú)特解決方案的關(guān)鍵是將客戶的應(yīng)用專業(yè)知識(shí)與我們近二十年的設(shè)計(jì)方法相結(jié)合,并輔以IP核和片上系統(tǒng)知識(shí)。 得益于以產(chǎn)品為導(dǎo)向的設(shè)計(jì)方法,數(shù)字核心設(shè)計(jì)可實(shí)現(xiàn)獨(dú)特的嵌入式系統(tǒng)解決方案,從而縮短了從事三個(gè)主要領(lǐng)域的公司的上市時(shí)間:開(kāi)發(fā)領(lǐng)先的 SoC 設(shè)計(jì),并將 IP