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CBTV24DD12AET中文資料
CBTV24DD12AET數(shù)據(jù)手冊(cè)規(guī)格書PDF詳情
General description
CBTV24DD12A is designed for 1.8 V/2.5 V/3.3 V supply voltage operation and it supports
Pseudo Open Drain (POD), SSTL_12, SSTL_15 or SSTL_18 signaling and CMOS select
input levels. This device is designed for operation in DDR4, DDR3 or DDR2 memory bus
systems, with speeds up to 3200 MT/s.
The CBTV24DD12A has a 1 : 2 switch or 2 : 1 multiplex topology and offers a 12-bit wide
bus. Each 12-bit wide A-port can be switched to one of two ports B and C, for all bits
simultaneously. Each port is non-directional due to the use of FET switches, allowing a
multitude of applications requiring high-bandwidth switching or multiplexing.
The selection of the port is by a simple CMOS input (SELect). Another CMOS input
(ENable) is available to allow all ports to be disconnected. The SEL0, SEL1 and EN input
signals are designed to operate transparently as CMOS input level signals up to 3.3 V.
CBTV24DD12A uses NXP’s proprietary high-speed switch architecture providing high
bandwidth, very little insertion loss, return loss, and very low propagation delay, allowing
use in many applications requiring switching or multiplexing of high-speed signals. It is
available in a 3.0 mm ? 8.0 mm TFBGA48 package with 0.65 mm ball pitch, for optimal
size versus board layout density considerations. It is characterized for operation from
?10 ?C to +85 ?C.
Features and benefits
2.1 Topology
? 12-bit bus width
? 1 : 2 switch/MUX topology
? Bidirectional operation
? Simple CMOS select pins (SEL0, SEL1)
? Simple CMOS enable pin (EN)
2.2 Performance
? 3200 MT/s throughput
? 7.4 GHz bandwidth (for both single-ended and differential signals)
? Low ON insertion loss
? Low return loss
? Low crosstalk
? High OFF isolation
? POD_12, SSTL_12, SSTL_15 or SSTL_18 signaling
? Low RON (8 ? typical)
? Low ?RON (<1 ?)
2.3 General attributes
? 1.8 V/2.5 V/3.3 V supply voltage operation
? Very low supply current (600 ?A typical)
? Back current protection on all the I/O pins of these switches
? ESD robustness exceeds 2.5 kV HBM, 1 kV CDM
? Available in TFBGA48 package, 3.0 mm ? 8.0 mm ? 1 mm size, 0.65 mm pitch,
Pb-free/Dark Green
Applications
? DDR4/DDR3/DDR2 memory bus systems
? NVDIMM module
? Systems requiring high-speed multiplexing
? Flash memory array subsystem
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
恩XP |
20+ |
IC |
4500 |
就找我吧!--邀您體驗(yàn)愉快問購(gòu)元件! |
|||
恩XP |
23+ |
TFBGA-48 |
6900 |
全新原裝正品現(xiàn)貨,支持訂貨 |
|||
恩XP |
2021+ |
TFBGA-48 |
6900 |
原廠原裝,假一罰十 |
|||
恩XP |
24+ |
TFBGA-48 |
30000 |
原裝正品公司現(xiàn)貨,假一賠十! |
|||
恩XP |
24+ |
TFBGA-48 |
6000 |
全新原裝深圳倉(cāng)庫(kù)現(xiàn)貨有單必成 |
|||
恩XP |
2022+ |
TFBGA-48 |
6900 |
原廠原裝,假一罰十 |
|||
恩XP |
21+ |
TFBGA-48 |
8080 |
只做原裝,質(zhì)量保證 |
|||
恩XP |
25+ |
TFBGA-48 |
8880 |
原裝認(rèn)準(zhǔn)芯澤盛世! |
|||
恩XP |
23+ |
TFBGA-48 |
8080 |
原裝正品,支持實(shí)單 |
|||
恩XP |
22+ |
TFBGA-48 |
2500 |
進(jìn)口原裝,優(yōu)勢(shì)現(xiàn)貨 |
CBTV24DD12AET 資料下載更多...
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