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1 General description

This document describes the functionality and electrical specification of the PN7220 high-power NFC controller

family with NCI interface.

As an NCI 2.2 compliant NFC controller with high RF output (2 W) and high receiver sensitivity, the NXP

PN7220 is a robust solution for payment terminals and all readers that must generate a strong RF field in a

difficult environment. Offering full compliance with EMVCo 3.1 L1 analog and digital, the PN7220 simplifies

designs while ensuring interoperability with a broad range of smartcards and mobile phones.

In addition to the reader/writer functionality, the device supports the emulation of ISO14443-A cards up to 848

kbit/s.

The PN7221 is based on the PN7220 and supports all features of PN7220 plus Enhanced Contactless

Polling (ECP) by Apple (see Ref. [12]) - this description is not part of this document. Note, that the ECP feature

is available after formal authorization only.

The PN7220 communicates to a connected host by a physical I2C interface using the NCI 2.2 protocol.

The PN7221 communicates to a connected host by a physical I2C interface using the NCI 2.2 protocol and supports Apple ECP.

2 Features and benefits

2.1 RF functionality

2.1.1 ISO/IEC14443-A

? Reader/writer mode supporting ISO/IEC 14443-A R/W up to 848 kbit/s

2.1.2 ISO/IEC 14443-B

? Reader/writer mode supporting ISO/IEC 14443-B up to 848 kbit/s

2.1.3 FeliCa

? Reader/writer mode supporting FeliCa 212 kbit/s and 424 kbit/s (without crypto)

2.1.4 Tag type reading

? Supports reading of all NFC tag types ( type 2, type 3, type 4A and type 4B, type 5 )

2.1.5 MIFARE card reading

? Reader/writer communication mode for the MIFARE card family including MIFARE Classic

Crypto supporting MIFARE Classic en-/decryption is integrated in hardware

2.1.6 ISO/IEC 15693

? Reader/writer mode supporting ISO/IEC 15693 (ICODE)

– RX: Manchester encoding with 424 kHz single-subcarrier (SSC) and 6.6 kBd

– RX: Manchester encoding with 424 kHz single-subcarrier (SSC) and 26 kBd

– RX: Manchester encoding with 424 kHz single-subcarrier (SSC) and 53 kBd

– TX: 1 of 4 encoding with 10 % modulation (53 kBd)

– TX: 1 of 4 encoding with 100 % modulation (53 kBd).

2.1.7 NFC Forum compliancy

? NFC Forum compliance for R/W – analog and digital

2.1.8 EMVCo compliancy

? EMVCo 3.1 compliance for R/W – digital

? EMVCo 3.1 compliance for R/W analog can be achieved, but depends on connected antenna geometry and

size, matching network and RF settings.

2.1.9 Host interface

The devices PN7220 and PN7221 support one host interface using a single interface connection based on a I2C

interface host interface (host interface 1) with data rates up to 3.4 Mbit/s.

The logical interface layer of the host interfaces is based on the NCI 2.0 interface specification, enhanced by

NXP proprietary commands.

The devices PN7222 and PN7223 support two host interfaces using one interface connection based on a I2C

interface (host interface 2) and one SPI interface (host interface 1).

2.2 Transmitter

? Transmitter with high RF output power of 2.0 W

? Dynamic power control 2.0 (DPC) (dynamic power control without processing load on host MCU)

? Adaptive waveshaping control (AWC)

2.3 Receiver

? Robust receiver: Automatic configuration, advanced insensitivity against TFT display noise for higher RF

performance

2.4 Integrated polling loop

? RF polling loop according to NFC Forum

? RF Polling loop according to EMVCo 3.1, integrated EMVCo L1 software stack

? Integrated EMVCo L1 contact stack

2.5 Integrated DC-DC

The PN7220 implements an integrated DC-DC which can be used to supply the transmitter. Since the supply

voltage of the transmitter LDO can be up to 6.0 Volts, this simplifies the design of the power supply.

A single supply concept for the RF system, for example, with single 3.3 V supply, is possible and allows making

use of the maximum RF output power by providing a maximum transmitter supply voltage.

The integrated DC-DC is used by the dynamic power control (DPC) to reduce the maximum power dissipation

of the chip.

The usage of the DC-DC is optional.

For applications making use of the low-power card detection, the DC-DC is available.

2.6 RF debugging support

? RF debugging without external probing of test signals possible by sampling debug data into chip-internal

memory based on pre-define trigger conditions – ideal debugging solution for PCI-compliant POS terminals

? One digital and one analog debug signal is provided by the chip for connection of an oscilloscope

3 Applications

? Payment terminals following the COTS security requirements with full EMVCo3.1 analog and digital

compliancy

? Multi-Application terminals

? Ticket validators for the controlling staff in public transport

? E-Vehicle charging stations

? Vending machines