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Features

■ Operating conditions

– Operating power supply: 1.8 V to 3.6 V

– Temperature range: -40 °C to 85 °C

■ Low power features

– 5 low power modes: Wait, Low power run

(5.9 μA), Low power wait (3 μA), Active-halt

with full RTC (1.4 μA), Halt (400 nA)

– Dynamic power consumption:

200 μA/MHz + 330 μA

– Ultra-low leakage per I/0: 50 nA

– Fast wakeup from Halt: 4.7 μs

■ Advanced STM8 core

– Harvard architecture and 3-stage pipeline

– Max freq. 16 MHz, 16 CISC MIPS peak

– Up to 40 external interrupt sources

■ Reset and supply management

– Low power, ultra-safe BOR reset with 5

programmable thresholds

– Ultra low power POR/PDR

– Programmable voltage detector (PVD)

■ Clock management

– 32 kHz and 1 to 16 MHz crystal oscillators

– Internal 16 MHz factory-trimmed RC

– 38 kHz low consumption RC

– Clock security system

■ Low power RTC

– BCD calendar with alarm interrupt

– Digital calibration with +/- 0.5ppm accuracy

– Advanced anti-tamper detection

■ LCD: 8x24 or 4x28 w/ step-up converter

■ Memories

– 64 KB Flash program memory and

256 bytes data EEPROM with ECC, RWW

– Flexible write and read protection modes

– 4 KB of RAM

■ DMA

– 4 channels supporting ADC, SPIs, I2C,

USARTs, timers

– 1 channel for memory-to-memory

■ 12-bit ADC up to 1 Msps/27 channels

– Internal reference voltage

■ Timers

– Three 16-bit timers with 2 channels (used

as IC, OC, PWM), quadrature encoder

– One 16-bit advanced control timer with 3

channels, supporting motor control

– One 8-bit timer with 7-bit prescaler

– 2 watchdogs: 1 Window, 1 Independent

– Beeper timer with 1, 2 or 4 kHz frequencies

■ Communication interfaces

– Two synchronous serial interfaces (SPI)

– Fast I2C 400 kHz SMBus and PMBus

– Three USARTs (ISO 7816 interface + IrDA)

■ Up to 54 I/Os, all mappable on interrupt vectors

■ Development support

– Fast on-chip programming and nonintrusive debugging with SWIM

– Bootloader using USART