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1 Features

Real-time Processing

? Contains up to three CPUs: two 32-bit C28x DSP

CPUs and one CLA CPU, all running at 200 MHz

? Delivers a total processing power equivalent to

1000-MHz Arm? Cortex?-M7 based device on realtime

signal chain performance (see the Real-time

Benchmarks Showcasing C2000? Control MCU's

Optimized Signal Chain Application Note)

? C28x DSP architecture

– IEEE 754 double-precision (64-bit) Floating-

Point Unit (FPU)

– Trigonometric Math Unit (TMU)

– Fast Integer Division (FINTDIV)

– CRC engine and instructions (VCRC)

? Control Law Accelerator (CLA) CPU

– IEEE 754 single-precision floating-point

– Executes code independently of C28x CPUs

Memory

? 1.28MB of CPU-mappable flash (ECC-protected)

with 5 flash banks

? 248KB of RAM (Enhanced Parity-protected)

? External Memory Interface (EMIF) with ASRAM,

SDRAM support or ASIC/FPGA

Analog Subsystem

? Three Analog-to-Digital Converters (ADCs)

– 16-bit mode, 1.19 MSPS each

– 12-bit mode, 3.92 MSPS each

– Up to 40 single-ended or 19 differential inputs

– Separate sample-and-hold (S/H) on each ADC

to enable simultaneous measurements

– Hardware post-processing of conversions

– Hardware oversampling (up to 128x) and

undersampling modes, with accumulation,

averaging and outlier rejection

– 24 redundant input channels for flexibility

– Automatic comparison of conversion results for

functional safety applications

? 11 windowed comparators with 12-bit Digital-to-

Analog Converter (DAC) references

– DAC with slope compensation – enabling peak

current and valley current mode control

– Connection options for internal temperature

sensor and ADC reference

? Two 12-bit buffered DAC outputs

Control Peripherals

? 36 Pulse Width Modulator (PWM) channels, all

with 150-ps high-resolution capability (HRPWM)

– Minimum Dead-Band Logic (MINDB), Illegal

Combo Logic (ICL), and other special features

(that is, Diode Emulation [DE]) support

– Enable Matrix Converters, Multilevel

Converters, and Resonant Converters support

without additional external logic

? Seven Enhanced Capture (eCAP) modules

– High-resolution Capture (HRCAP) available on

two of the seven eCAP modules

– Two new monitor units for edge, pulse width,

and period that can be coupled with ePWM

strobes and trip events

– Increased 256 inputs for more capture options

– New ADC SOC generation capability

– eCAP can also be used for additional PWM

– Six Enhanced Quadrature Encoder Pulse

(eQEP) modules

– 16 Sigma-Delta Filter Module (SDFM) input

channels, 2 independent filters per channel

– Embedded Pattern Generator (EPG)

? Configurable Logic Block

– Six logic tiles to augment existing peripheral

capability or define customized logic to reduce

or remove external CPLD/FPGA

– Supports Encoder interfaces without the need

of FPGA

– Enables customized PWM generation for power

conversion

Communications Peripherals

? EtherCAT? SubordinateDevice (or SubDevice)

Controller (ESC)

? USB 2.0 (MAC + PHY)

? Fast Serial Interface (FSI) enabling up to 200Mbps

data exchange across isolation

? Four high-speed (up to 50-MHz) SPI ports

? Four Serial Communications Interfaces (SCI)

(support UART)

? Two high-speed (25Mbps) Universal

Asynchronous Receiver/Transmitters (UARTs)

? Two I2C interfaces (400Kbps)

? External boot option via SPI/ SCI/I2C

? Two UART-compatible Local Interconnect Network

(LIN) Modules (support SCI)

? Power-Management Bus (PMBus) interface

(supports I2C)

? One Controller Area Network (CAN/DCAN)

? Two CAN FD/MCAN Controller Area Networks with

Flexible Data Rate

System Peripherals

? Two 6-channel Direct Memory Access (DMA)

controllers

? 185 individually programmable multiplexed

General-Purpose Input/Output (GPIO) pins

? Expanded Peripheral Interrupt controller (ePIE)

? Low-power mode (LPM) support

? Embedded Real-time Analysis and Diagnostic

(ERAD)

? Background CRC (BGCRC)

Security Peripherals

? Advanced Encryption Standard (AES-128, 192,

256) accelerator

? Security

– JTAGLOCK

– Zero-pin boot

– Dual-zone security

? Unique Identification (UID) number

Safety Peripherals

? Easier implementation with Reciprocal comparison

? Lockstep on C28x CPU 2

? Memory Power-On Self-Test (MPOST)

? Hardware Built-in Self-Test (HWBIST)

? Functional Safety-Compliant targeted

– Developed for functional safety applications

– Documentation will be available to aid

ISO 26262 and IEC 61508 system design

– Systematic capability up to ASIL D and SIL 3

targeted

– Hardware capability up to ASIL B and SIL 2

targeted

? Safety-related certification

– ISO 26262 and IEC 61508 certification up to

ASIL B and SIL 2 by TüV SüD planned

Clock and System Control

? Two internal 10-MHz oscillators

? On-chip crystal oscillator

? 2*APLL, BOR, Redundant interrupt vector RAM

? Windowed watchdog timer module

? Missing clock detection circuitry

? Dual-clock Comparator (DCC)

? Live Firmware Update (LFU)

– Fast context switching from old to new firmware

with or without a power cycle

? 1.2-V core, 3.3-V I/O design

– Internal VREG for 1.2-V generation

– Brownout reset (BOR) circuit

Package options:

? Lead-free, green packaging

? 256-ball New Fine Pitch Ball Grid Array (nFBGA)

[ZEJ suffix], 13 mm × 13 mm/0.8-mm pitch

? 176-pin PowerPAD? Thermally Enhanced Lowprofile

Quad Flatpack (HLQFP) [PTP suffix],

26 mm × 26 mm/0.5-mm pitch

? 169-ball New Fine Pitch Ball Grid Array (nFBGA)

[NMR suffix], 9 mm × 9 mm/0.65-mm pitch

? 100-pin PowerPAD? Thermally Enhanced Thin

Quad Flatpack (HTQFP) [PZP suffix], 16 mm ×

16 mm/0.5-mm pitch

Temperature

? Ambient (TA ): –40°C to 125°C (industrial and

automotive qualified)

2 Applications

? Servo drive control module

? Robot Servo Drive

? CNC control

? Mobile robot motor control

? HVAC large commercial motor control

? Linear motor segment controller

? Central inverter

? String inverter

? Power Conversion System

? DC Fast Charging Station

? Inverter & motor control

? Industrial AC-DC

? Three phase UPS

? Single phase online UPS

? Merchant network and server PSU

? On-board (OBC) & wireless charger

? Automotive HVAC compressor module

? Headlight

3 Description

The TMS320F28P65x (F28P65x) is a member of the C2000? real-time microcontroller family of scalable,

ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power

density, high switching frequencies, and supporting the use of IGBT, GaN, and SiC technologies.

These include such applications as:

? Industrial motor drives

? Motor control

– Traction inverter motor control

– HVAC motor control

– Mobile robot motor control

? Solar inverters

– Central inverter

– Micro inverter

– String inverter

? Digital power

? Electrical vehicles and transportation

? EV charging infrastructure

? Energy Storage systems

? Industrial & collaborative robot

? Industrial machine & machine tools

? Industrial mobile robot

The real-time control subsystem is based on TI’s 32-bit C28x DSP core, which provides 200 MIPS of signalprocessing

performance in each core for floating- or fixed-point code running from either on-chip flash or SRAM.

This is equivalent to the 400-MHz processing power on a Cortex?-M7 based device (C28x DSP core gives two

times more performance than the Cortex?-M7 core).The C28x CPU is further boosted by the Trigonometric Math

Unit (TMU) and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms

key to real-time control systems. Extended instruction sets enable IEEE double-precision 64-bit floating-point

math. Finally, the Control Law Accelerator (CLA) enables an additional 200 MIPS per core of independent

processing ability. This is equivalent to the 280-MHz processing power on a Cortex?-M7 based device (CLA

CPU gives 40% more performance than the Cortex?-M7 core).

The lockstep dual-CPU comparator option has been added in the secondary C28x CPU along with ePIE and

DMA for detection of permanent and transient faults. To allow fast context switching from existing to new

firmware, hardware enhancements for Live Firmware Update (LFU) have been added to F28P65x.

High-performance analog blocks are tightly integrated with the processing and control units to provide optimal

real-time signal chain performance. The Analog-to-Digital Converter (ADC) has been enhanced with up to

40 analog channels, 22 of which have general-purpose input/output (GPIO) capability. Implementation of

oversampling is greatly simplified with hardware improvement. For safety-critical ADC conversions, a hardware

redundancy checker has been added that provides the ability to compare ADC conversion results from multiple

ADC modules for consistency without additional CPU cycles. Thirty-six frequency-independent PWMs, all with

high-resolution capability, enable control of multiple power stages, from 3-phase inverters to advanced multilevel

power topologies. The PWMs have been enhanced with Minimum Dead-Band Logic (MINDL) and Illegal Combo

Logic (ICL) features.

The inclusion of the Configurable Logic Block (CLB) allows the user to add custom logic and potentially integrate

FPGA-like functions into the C2000 real-time MCU.

An EtherCAT SubDevice Controller and other industry-standard protocols like CAN FD and USB 2.0 are

available on this device. The Fast Serial Interface (FSI) enables up to 200 Mbps of robust communications

across an isolation boundary.

As a highly connected device, the F28P65x also offers various security enablers to help designers implement

their cyber security strategy and support features like hardware encryption, secure JTAG and secure Boot.